Nick Blatchford has come up with an analysis of IBM's new cell technology, and it's as neat as I said it was yesterday. Maybe neater.

Think of it as a LAN on a chip. Not just the network itself, but the computers on the network and, to some extent, the people behind the computers as well. (The illustration is from the first section of Blatchford's report.)

Software programs on the chip, called apulets, portion work out among the computing sections, then recompile the results, the way an editor does at a newspaper desk. (Only without the coffee and the yelling and the pressure or the beer after work for a job well done.)

The result is true multi-tasking. As good as some teenagers, who will listen to music, watch TV, and gab on the phone while allegedly doing their homework, and still get As. (You know who you are.)

The best thing, though, is that this thing scales. You have 8 cells on the chip now. You can have more.

I'm no electrical engineer. I just went to school with some fine ones and picked up some of the lingo by osmosis. But it does seem to me that the "dual core" ideas Intel has committed to are merely extended here, in a way very consistent with Moore's Law.

The key point Moore missed (because it wasn't relevant to the paper, hadn't been discovered, and don't you dare criticize Mr. Moore for this) is that the exponential improvements he saw in silicon fabrication apply elsewhere. As I've written many times here, they apply to fiber, they apply to storage, to optical storage, to radios.

And now, for the first time, they may apply to chip design.

A few more points:

• It seems likely to me that cell design will allow for the manufacture of larger chips. Since you can now use the extra real estate efficiently, what's wrong with having it there?
• If you can portion out jobs among cells, through this design, shouldn't it be possible to portion out work among groups of cells, through what I might call a "managing editor" apulet?
• My guess is that tomorrow's winners in the World's Fastest Computer wars will be single-chip machines, because it's inherently inefficient to go off-chip for resources if things can be handled on-chip. It's like flying to a meeting.

It's only just begun.